Based on a hint elsewhere, I tried to see if I could get faster output...
So without getting into assembler, I looked at direct port manipulation:
(Yeah, I'm just setting all the pins for now).
That gives me a 748Khz signal. Amazingly quicker!
Removing the boolean test
This is the resulting assembler:
Gives me a 3.9Mhz signal!
What's interesting, here, isn't the asymmetric on/off cycle (expected; need some NOPs in there to balance it out) but that the output is really noisy with massive overshoot on both low->high and high->low
transitions!
( Scope trace at 3.9Mhz )
Of course we see these spikes at lower frequencies as well, but at this high speed the stabilisation time is a large portion of the signal.
( Scope trace at 748Khz )
FWIW, with two asm("nop") instructions in between the two PORTD settings I get 2.6Mhz
( Scope trace at 2.6Mhz )
Interesting stuff!
So without getting into assembler, I looked at direct port manipulation:
DDRD=B11111111; boolean x=false; while(1) { x=!x; if (x) { PORTD=255; } else { PORTD=0;} }
(Yeah, I'm just setting all the pins for now).
That gives me a 748Khz signal. Amazingly quicker!
Removing the boolean test
while (1) { PORTD=255; PORTD=0; }
This is the resulting assembler:
ldi r24,lo8(-1) .L4: out 43-32,r24 out 43-32,__zero_reg__ rjmp .L4
Gives me a 3.9Mhz signal!
What's interesting, here, isn't the asymmetric on/off cycle (expected; need some NOPs in there to balance it out) but that the output is really noisy with massive overshoot on both low->high and high->low
transitions!
( Scope trace at 3.9Mhz )
Of course we see these spikes at lower frequencies as well, but at this high speed the stabilisation time is a large portion of the signal.
( Scope trace at 748Khz )
FWIW, with two asm("nop") instructions in between the two PORTD settings I get 2.6Mhz
( Scope trace at 2.6Mhz )
0000 8FEF ldi r24,lo8(-1) .L4: 0002 8BB9 out 43-32,r24 0004 0000 nop 0006 0000 nop 0008 1BB8 out 43-32,__zero_reg__ 000a 00C0 rjmp .L4
Interesting stuff!